5.66. Double Precision Negate Register


Addr
Mode  Mnemonic          Format/Opcode
                           8      4      4
                        ----------------------
R     DNEG   RA,RB      |  B5  |  RA  |  RB  |
                        ----------------------

Description. The negative (i.e., the 2's complement) of the Derived Operand, DO (i.e., the contents of register RB and RB+1), is stored into register RA and RA+1 such that register RA contains the MSH of the result. The condition status, CS, is set based on the result in register RA and RA+1.

Note: The negative of zero is zero.

Note: The negative of a number with a 1 in the sign bit and all other bits zero is the same word, and causes fixed point overflow to occur.

Register Transfer Description.

(RA, RA+1) <-- -DO;
PI4 <-- 1, exit, if DO = 8000 0000 16;
(CS) <-- 0010  if (RA,RA+1) = 0;
(CS) <-- 0001  if (RA,RA+1) < 0;
(CS) <-- 0100  if (RA,RA+1) >= 0;

Registers Affected. RA, RA+1, CS, PI