5.8. Reset Variable Bit in Register

Addr
Mode  Mnemonic          Format/Opcode
                           8      4      4
                        ----------------------
R     RVBR   RA,RB      |  5C  |  RA  |  RB  |
                        ----------------------

Description. Bit number N (0 <= N <= 15) of register RB is set to zero where the least significant four bits of the contents of register RA is N. Bits (RA)_0-11 have no effect on the operation. If RA = RB, then the count is determined first and then the appropriate bit is changed.

Register Transfer Description.

(RB)_N <-- 0_12-15 where  N = (RA) ;

Registers Affected. RB