5.7. Set Variable Bit in Register

Addr
Mode  Mnemonic          Format/Opcode
                           8      4      4
                        ----------------------
R     SVBR  RA,RB       |  5A  |  RA  |  RB  |
                        ----------------------

Description. Bit number N (0 <= N <= 15) of the register RB is set to one where the least significant four bits of the contents of register RA is N. Bits (RA)_0-11 have no effect on the operation. If RA = RB, then the count is determined first and then the appropriate bit is changed.

Register Transfer Description.

(RB)_N <-- 1 where  N = (RA) _12-15;

Registers Affected. RB