MIL-STD-1750A: Military Standard Sixteen-Bit Computer Instruction Set Architecture | ||
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Addr Mode Mnemonic Format/Opcode 8 4 4 16 D SJS RA,LABEL -------------------------------------- DX SJS RA,LABEL,RX | 7E | RA | RX | | LABEL | --------------------------------------
Description. The contents of register RA are decremented by one. The address of the instruction following the SJS instruction is stored into the memory location pointed to by RA. Program control is then transferred to the instruction at the Derived Address, DA. RA is the stack pointer and can be selected by the programmer as any one of the 16 general registers.
Note: If RA = RX, then the derived address, DA, is calculated before RA is decremented.
Register Transfer Description.
(RA) <-- (RA) - 1;
[(RA)] <-- (IC);
(IC) <-- DA;
Registers Affected. IC, RA