C.4. Opcodes

C.4.1. Extended Floating Load Register (ELFR)

The 1750 does not have the important load register instruction for extended precision floating point. The reason is we can copy a three-word extended floating point value from one triple register to another using a single load register and a double load register. However, if the source triple and destination triples overlap, then it is important to get the single and double load in the correct order otherwise the source will be overwritten before it is completely copied.

The opcode EFLR is translated by the assembler into either a single load followed by a double load, or a double load followed by a single load, depending on which registers are used, and guarantees correct operation.

Note that the condition codes will not be correctly set by EFLR. To set the condition codes you should do an extended compare with zero. Of course to check whether a number is negative or not, no matter whether it is a 16 bit, 32 bit or 48 bit, fixed or floating, you only have to test the sign bit of the first word.

C.4.2. Expanded Memory Support

There are two macro-like instructions, LSJS and LURS, for supporting subprogram call and return across address states. Normally these will be translated by the assembler into SJS and URS instructions, but if the assembler is run with the expanded memory option -Along-calls then LSJS is expended into a sequence of instructions that makes a call to a subprogram that may be in a different address state and uses the BEX 0 instruction. The LURS instruction is converted into a BEX 2 instruction.

The instruction LLIM is used to load a long (24-bit) byte address into a pair of registers. The address can then be used in the 1750B long load and store instructions, such as LSL and LSS.

C.4.3. Branch Improvement

Certain pseudo opcodes are permitted for branch instructions. They expand to the shortest branch instruction that can reach the target address. Generally these mnemonics are made by substituting "j" for "b" at the start of a standard 1750 mnemonic.

The following table summarizes the pseudo-operations for branches.

C.4.4. XIO Commands

All the MIL-STD-1750A and 1750B XIO commands are supported. They may be used in both XIO and VIO instructions.

You may write XIO instructions in Ada using the predefined package Machine_Code, as in the following example:

with Machine_Code;
procedure Enable_Interrupts is
   use Machine_Code;
begin
   Asm ("xio    r0, ENBL");
end Enable_Interrupts;

C.4.5. Special Characters

There are two special characters used to indicate the start of a comment. These are '!' and '#'. The line-comment character is !. If a # appears at the beginning of a line, it is treated as a comment unless it looks like # line file, in which case it is treated normally.