Earlier we discussed the standard option “-b”, which chooses among different installed compilers for completely different target machines, such as Vax vs. 68000 vs. 80386.
In addition, each of these target machine types can have its own special options, starting with “-m”, to choose among various hardware models or configurations — for example, 68010 vs 68020, floating coprocessor or none. A single installed version of the compiler can compile for any model or configuration, according to the options specified.
Some configurations of the compiler also support additional special options, usually for compatibility with other compilers on the same platform.
The compiler can generate code for several different members of the MIL-STD-1750 family and to support expanded memory. The default is the MIL-STD-1750A without expanded memory. For detailed information about the differences, see the draft military standard MIL-STD-1750B, which covers both the 1750A and the 1750B, or see your 1750 vendor's literature.
Support expanded memory.
Do not support expanded memory. This is the default.
Permit 1750B optional mathematical instructions.
Permit 1750B optional long loads and stores.
Permit 1750B optional unsigned arithmetic and load and store byte instructions.
Reject 1750B optional mathematical instructions.
Reject 1750B optional long loads and stores.
Reject 1750B optional unsigned arithmetic and load and store byte instructions.
These “-m” switches are supported on the ERC32:
Specify “-mapp-regs” to generate output using the global registers 2 through 4, which the SPARC SVR4 ABI reserves for applications. This is the default.
To be fully SVR4 ABI compliant at the cost of some performance loss, specify “-mno-app-regs”. You should compile libraries and system software with this option.
Generate output containing floating-point instructions. This is the default.
Generate output containing library calls for floating point.
| Warning |
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The requisite floating-point emulation libraries are not provided as standard. |
“-msoft-float” changes the calling convention in the output file; therefore, it is only useful if you compile all of a program with this option.
With “-mepilogue” (the default), the compiler always emits code for function exit at the end of each function. Any function exit in the middle of the function (such as a return statement in C) will generate a jump to the exit code at the end of the function.
With “-mno-epilogue”, the compiler tries to emit exit code inline at every function exit.
Assume that doubles have 8 byte alignment. This is the default.
With “-munaligned-doubles”, the compiler assumes that doubles have 8 byte alignment only if they are contained in another type, or if they have an absolute address. Otherwise, it assumes they have 4 byte alignment. Specifying this option avoids some rare compatibility problems with code generated by other compilers. It is not the default because it results in a performance loss, especially for floating-point code.
Align loops to a 2 raised to a num byte boundary. If “-malign-loops” is not specified, the default is 2.
Align instructions that are only jumped to to a 2 raised to a num byte boundary. If “-malign-jumps” is not specified, the default is 2.
Align the start of functions to a 2 raised to num byte boundary. The default alignment is 4 bytes.
Select a SPARC V7 chipset.
Select the Temic revision CBA chipset (the default).
Select the Temic revision CCA chipset.
Select the Temic revision CDA chipset.
Generate code for cpu, where cpu is either v7, cba, cca or cda. The default is cba.